Pre-silicon Validation Engineer Job Description
Pre-silicon Validation Engineer Duties & Responsibilities
To write an effective pre-silicon validation engineer job description, begin by listing detailed duties, responsibilities and expectations. We have included pre-silicon validation engineer job description templates that you can modify and use.
Sample responsibilities for this position include:
Pre-silicon Validation Engineer Qualifications
Qualifications for a job description may include education, certification, and experience.
Education for Pre-silicon Validation Engineer
Typically a job would require a certain level of education.
Employers hiring for the pre-silicon validation engineer job most commonly would prefer for their future employee to have a relevant degree such as Bachelor's and Master's Degree in Computer Engineering, Computer Science, Electronics, Design, Computer, Electrical Engineering, Engineering, Architecture, Communication, Software Engineering
Skills for Pre-silicon Validation Engineer
Desired skills for pre-silicon validation engineer include:
Desired experience for pre-silicon validation engineer includes:
Pre-silicon Validation Engineer Examples
Pre-silicon Validation Engineer Job Description
- Development of verification collateral (such as behavioral checkers, coverage monitors, test generators or score-boards) is often required to enable test plan execution
- Use scripting skills to enable tool development and automation for verification efficiency
- Pre-Silicon validation of Image Processing Subsystem
- Development of validation Strategy, Plans, Coding and Debug of scenarios on Pre-Si Validation platform
- Development & bring-up of Pre-Silicon Validation platforms like Palladium/ZeBU/Veloce or FPGA for the IP/SOC Validation
- Development and execution of system use case scenarios
- Writing software to provide controllability and observability into the architectural mode
- As a Pre/Post Silicon Validation Engineer, you are required to create, define and develop system validation environment & test suites
- You are responsible for the development of methodologies, execution of validation plans, and debug of failures
- You are responsible in validating the functionality of new architectural features of next generation designs by developing test plans, tests content, coverage points or test tools
- Proficient in pre-silicon validation of complex ASIC and SOC designs
- Experience of working on SoC projects with a proven track record of successful first rime delivery of projects
- Knowledge of C/C++, SystemC, Perl, TCL, Shell scriptingl/Tk/Perl
- Knowledge of Software paradigms such as Polymorphism and Inheritance
- Define and enhance methodologies for pre-silicon validation of high complexity IP/SoC designs improving the overall efficiency and velocity of the pre-silicon validation team
- Interact closely with the architecture and design teams, influencing product definition, implementation and validation
Pre-silicon Validation Engineer Job Description
- When appropriate, verify low power design features at the subsystem level using power-aware verification technique and formal verification
- Plan and implement the UVM testbench, functional coverage model and assertions
- Close collaboration with architects and logic/analog designers
- Validation of an IP or feature, either directly or at the system level
- Creating plans and tests for validating portions of a complex microarchitecture using written specs, RTL code and other tests as a guide
- Learning the architecture and microarchitecture by debugging failures to the root cause
- Developing and utilizing various debug and validation tools and/or methodologies to implement validation plans with the goal being to ensure a solid design
- Participating in the debug of failures on silicon and developing new testing strategies to detect these failures on RTL models
- Engaging with IP providers and customers to define, develop and deliver necessary infrastructure and address issues found during execution
- Developing tools and methods to streamline IP development and SOC integration to deliver highest quality in shortest time possible
- Report status to project leads
- Drive resolution of issues with development teams quickly
- Set aggressive goals and meet the commitments
- SOC microarchitecture and system level skills
- Chip and/or system / platform level Validation / Verification
- Knowledge in IA architecture / Multiple Operating Systems / SW / FW /
Pre-silicon Validation Engineer Job Description
- Analyze, interpret and assess HW and FW architectural specifications to define security requirements for IP/SoC designs
- Review new IP/SoC HW/FW architecture to drive upstream design development to meet product security objectives
- Contribute to downstream post-silicon and platform security validation actively participate in customer security matters
- Building multiple emulation targets for an SoC
- Adding support for new features/IPs into existing emulation models
- Drive/Participate in discussions across various disciplines to get a clear understanding of requirements
- Develop/run/debug tests in SystemVerilog
- Actively review code created by fellow team mates
- Track progress of self/subteam to achieve goals timely
- Provide indicators and guidance to management on issues and roadblocks on a timely basis
- Experience in pre-silicon validation ( 2-6 years)
- Proven capabilities in strong RTL coding (Verilog MUST
- Significant Experience in PCIE
- Opportunity to drive for methodology and technology enhancements that spans
- The applicant should have Bachelor/Master degree in relevant field
- Knowledge in RTL integration and validation methodologies is a plus
Pre-silicon Validation Engineer Job Description
- Functional validation tests to verify system will meet design requirements
- Creation of test plans for RTL validation
- Define and run system simulation models
- Finding and implementing corrective measures for failing RTL tests
- Debug failing tests
- Work with designers and architects to resolve bugs
- Working with Performance Architecture team to come up with a performance test plan
- Develop methodologies and techniques to drive performance validation to meet product requirements
- Collaborate with architects, hardware engineers, and ucode engineers to understand the new features being implemented, create test plans and functional coverage metrics
- Validation of an IP at the IP or system level
- Ability to communicate well with counterparts and key stakeholders including multinational partners
- BS in electrical engineering or computer engineering, and at least three years professional experience
- 5-8 years of experience in validating multi-million gate IP/Subsystem/SoC
- Should be able to understand system level environment for MicroControllers
- Understanding of Image Processing, Machine Vision fundamentals, and algorithms HOG, HAAR would be an advantage
- Planning Test strategy, creating test plan and test code development to address functional and performance requirements of the IP/Subsystem
Pre-silicon Validation Engineer Job Description
- Decomposing problems to fit within the scope of fully automated formal verification tools
- Determining what level of formal verification is sufficient for delivery of an IP or feature to customers
- Keeping aware of advancements in formal verification tools and methodologies with the goal of determining applicability to owned IP and features
- System level validation tasks such as using FPGAs and emulators
- Developing high level (for example, System C) modeling for RTL components
- Collaborate with architects, hardware engineers, and ucode engineers to understand the new features being implemented
- Read and interpret technical specs and create high quality technical documentation like test plans, strategy documents and coverage plans
- Developing validation content like tools, test generators to match the complexity of new cores and be reused in pre-si and post-si
- Investigating new techniques to accelerate validation of CPU hardware
- Perform all aspects of the SoC design flow from high-level design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing
- Experience of Formal Verification Tools
- Experience with C/C++ and working knowledge of verilog and is a must
- Expertise in using compiler and debugging tools like GHS, Lauterbach
- Software Architecture, device driver knowledge would be an advantage
- Working knowledge of Palladium & FPGA platform
- Expertise in using validation environment test equipment Logic Analyzers, Oscilloscope, Protocol Analyzers