Pre-silicon Validation Engineer Resume Samples

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K Walker

Kirstin

Walker

61200 Billy Mountains

Houston

+1 (555) 899 0577

61200 Billy Mountains

Houston

Phone

p +1 (555) 899 0577

Experience Experience

Boston, MA

Pre-silicon Validation Engineer

Boston, MA

Dooley-Frami

Boston, MA

Pre-silicon Validation Engineer

Reviewing IP component specification, developing and executing full chip and/or cluster level validation plans
Validating the functionality of new architectural features of next generation designs by developing testplan, develop tests content, coverage point or test tools
Work within the larger validation and design teams to cover the pre-si coverage plan and find/resolve all RTL bugs ahead of TO
Providing technical guidance and mentoring junior engineers on the team
Developing automated tools or scripts for the pre-silicon validation environment
Representing RTL team to provide IP integration support to SOC customers
Validating designs at block or full-chip level by authoring validation plans, writing focus tests, creating templates defining coverage strategies, developing and analyzing coverage monitors, creating event injectors, writing architectural and micro-architectural correctness checkers, developing BFMs (Bus Functional Model), running functional simulations, and debugging failures

Boston, MA

Server SoC Pre-silicon Validation Engineer

Boston, MA

Kuhn, Walter and Ebert

Boston, MA

Server SoC Pre-silicon Validation Engineer

Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results
Architect verification environments, develop tests and test bench components from high level verification plans
Performs all aspects of the SoC design flow from high-level design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing
Contributes to the development of multidimensional designs involving the layout of complex integrated circuits
Performs Logic design for integration of cell libraries, functional units and sub-systems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs
Creates test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests
Oversees definition, design, verification, and documentation for SoC (System on a Chip) development

present

San Francisco, CA

Senior Pre-silicon Validation Engineer

San Francisco, CA

Dooley, Gutkowski and Reinger

present

San Francisco, CA

Senior Pre-silicon Validation Engineer

present

Documenting failures in a bug tracking database and driving them to closure
Designing and debugging SystemVerilog-based verification testbenches
Finding the flaws in the design, whether they exist at the architectural or micro-architectural level
Finding the root cause for failures in either testbench or design code
Working with the Product Development Engineering (PDE) team to help facilitate silicon characterization testing
Developing or using checking software to compare model behavior against a specification
Defining and developing SystemVerilog-based validation environments and test suites

Education Education

Bachelor’s Degree in Electrical Engineering

University of California, Santa Barbara

Bachelor’s Degree in Electrical Engineering

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8 Pre-silicon Validation Engineer resume templates

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Pre-silicon Validation Engineer Resume Examples & Samples

Strong problem solving skills and ability to clarify ambiguity
Clear, concise communication and a collaborative personality
Minimum of 3 months experience in the pre-silicon verification of designs such as CPUs, networking or peripheral controllers
Proficient in SystemVerilog, SVA and functional coverage
Experience with verification methodology such as UVM/OVM

Pre-silicon Validation Engineer Resume Examples & Samples

3+ years of experience in logic design
3+ years of pre-silicon validation experience
Experience with high level OOP languages such as C++ & Java
Knowledge of modern SOC architecture, bus infrastructure, memory data flow and security issues
Knowledge of validation methodology and tools, including OVM, UVM, eRM, desired
Knowledge of high speed I/O and related protocols

Pre-silicon Validation Engineer Resume Examples & Samples

Work within the larger validation and design teams to cover the pre-si coverage plan and find/resolve all RTL bugs ahead of TO
Working in a very team-oriented environment and interacting with engineers from other design disciplines
Knowledge of high speed I/O and related protocol

Pre-silicon Validation Engineer Resume Examples & Samples

Defining and developing SystemVerilog-based validation environments and test suites
Turning design documentation into a validation plan and executing the validation plan
Writing test cases and executing them in a simulation environment, and debugging simulation failures
Defining and running regressions, and triaging regression failures
Documenting failures in a bug tracking database and driving them to closure
2+ years of relevant experience with development of Pre-Silicon validation environments
Knowledge of computer architecture and/or network technology
Object oriented programming skills with C/C++, Java or SystemVerilog
Knowledge of SystemVerilog Testbench & Assertions
UVM/OVM experience

Pre-silicon Validation Engineer Resume Examples & Samples

Strong inter-personal & communication skills
BSEE/BSCE/MSEE/MSCE
Minimum experience/exposure in SOC/ASIC implementation of varied complexities & flow/methodology development
Minimum of 3 months experience in computer architecture, analog & digital logic design, Object Oriented Programming skills (C/C++, Java)
Knowledge of validation methodology and tools, including OVM, UVM, eRM
1Yr+ experience and/or training in Non Volatile Memory (NVM) or xRAM memory controller design
Experience with microarchitecture verification

Pre-silicon Validation Engineer Resume Examples & Samples

BS or MS in Electrical or Computer Engineering
Minimum 3 month experience in Computer Engineering and Digital Logic Design
Minimum 3 month experience in programming skills with Object Oriented languages such as C++, System Verilog or Specman
Scripting skills - PERL, TCL, etc
Experience with RTL simulators
Test bench development experience

Senior Pre-silicon Validation Engineer Resume Examples & Samples

B.S. or M.S. Degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent
4+ years of pre-silicon validation experience using constrained random verification
3+ years of experience with SystemVerilog or similar and OOP concepts
Experience with OVM/UVM or similar
Proficient in Verilog/SystemVerilog
Deep experience in at least one of these areas will be a strong plus: 1) PCIe, SR-IOV 2) 10/40/100G Ethernet MAC/PCS 3) L2-L3 Packet Switching, Routing, and Classification 4) Low-latency networking design
Proficient in scripting in languages such as Perl and TCL

Pre-silicon Validation Engineer Resume Examples & Samples

Rigorously develop and execute a verification plan of complex digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios
Design and debug SystemVerilog based testbenches using constrained-random verification techniques
Identify and write all types of coverage measures for stimulus and corner-cases
Debug tests with design engineers to deliver functionally correct design blocks
Close coverage measures to identify verification holes and to show progress towards tape-out
2+ years of experience in the pre-silicon verification of designs such as CPUs, switches, routers or peripheral controllers

Pre-silicon Validation Engineer Resume Examples & Samples

Designing and debugging SystemVerilog-based verification testbenches
Rigorously developing and executing a verification plan, including stimulus, checking, and coverage required
Finding the root cause for failures in either testbench or design code
Finding the flaws in the design, whether they exist at the architectural or micro-architectural level
2+ years pre-silicon validation experience
OVM or UVM and constrained random verification is highly desired
Proficient in Verilog / System Verilog
Experience in pre-silicon validation experience on multiple ASICS
Deep experience in at least one of these areas 1) PCIe, SR-IOV 2) 10/40/100G MAC/PCS 3) L2-L3 Packet Switching, Routing, and Classification 4) Low-latency networking design

Pre-silicon Validation Engineer Resume Examples & Samples

Involve in RTL logic design (in System Verilog, Verilog and other Hardware description language)
Validating the functionality of new architectural features of next generation designs by developing testplan, tests content or test tools
Developing automated tools or scripts for the pre-silicon validation environment
Representing RTL team to provide IP integration support to SOC customers
Experience in System Verilog, OVM and testbench development
Able to develop testplan, to write tests and develop coverage point for validation purpose based on high level Architecture spec
Experience in VLSI or Structural and Physical design flow/methodology would be added value
Experience in PCI express, any Industrial standard bus protocol would be added value
Strong analytic skill and creative in problem solving

Pre-silicon Validation Engineer Resume Examples & Samples

Reviewing IP component specification, developing and executing full chip and/or cluster level validation plans
Contributing to testbench and tools development, including scan support
Debugging test and/or regression failures and working with the RTL design team to drive bug resolutions
Developing and executing on GLS plans
Working with the Product Development Engineering (PDE) team to help facilitate silicon characterization testing
Providing technical guidance and mentoring junior engineers on the team
Bachelors or Master’s degree in Electrical or Computer Engineering with 4+ years of relevant industry experience in
Previous experience with OVM/UVM verification methodologies
Strong written/verbal communication skills are a must, as you will be working, influencing and collaborating with teams in distributed locations

Pre-silicon Validation Engineer Resume Examples & Samples

Bs.c or Ms.c in Electrical Engineering
Creativity and tem work
Knowledge in System-Verilog - advantage
Knowledge in OVM/UVM methodology - advantage

Server SoC Pre-silicon Validation Engineer Resume Examples & Samples

Develops pre-Silicon functional validation tests to verify system will meet design requirements
Creates test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests
Analyzes and uses results to modify testing
Ensures the logical design of a microprocessor satisfies the architectural specification
Creates and optimizes the validation environment, tools and methodologies
Generates focused and random test cases, analyzing coverage and debugging failure cases
Architect verification environments, develop tests and test bench components from high level verification plans
As well as debug of failing tests, definition of functional coverage space, implementation of coverage monitors and analysis of test coverage space
Regression running and debugging failing tests, design and development of test bench collateral
Team members will also work closely with design and architecture teams to review and refine test and coverage requirements

Pre-silicon Validation Engineer Resume Examples & Samples

Defining validation testbench and building RTL models
Validating the functionality of new architectural features of next generation designs by developing testplan, tests content, coverage point or test tools
Experience in System Verilog, OVM, RTL model build or testbench development
Capable in developing testplan, tests contents and coverage points for validation purpose based on High Level Architecture spec
Experience in VLSI or Structural and Physical design flow/methodology
Experience in PCI express or any Industrial standard bus protocol would be added value
Strong analyzing and debugging skill, and creative in problem solving
Strong programming skill (in Perl, C++ or etc)

Pre Silicon Validation Engineer Resume Examples & Samples

2+ years of Experience in pre-silicon validation
Experience in System Verilog and UVM or OVM methodology
PHY/SerDes experience- advantage
Ethernet protocol knowledge (of the lower layers) - advantage
Creativity and team work

Pre-silicon Validation Engineer Resume Examples & Samples

Problem-solving Skills - Ability to Multitask
Ability to Work in a Dynamic Team-Oriented Environment
SystemVerilog VVM/OVM/UVM and/or Object-Oriented Programming Techniques
Verilog and/or similar HDLs - Computer Architecture and Digital Logic
Verification Techniques including Assertions, Monitors, Scoreboards, Functional Coverage, and Randomized Regressions
Design/Verification Tools such as VCS, Debussy, Verdi, DVE, DVT, & GDB - Testbench Architecture

Server SoC Pre-silicon Validation Engineer Resume Examples & Samples

Experience using 1 or more of the following languages: System Verilog/Verilog, Perl, C/C++
Familiarity with hardware description languages
Experience specifying and developing test bench components, specifying and developing, and strong debug capabilities, and experience specifying, implementing and analyzing functional coverage

Pre-silicon Validation Engineer Resume Examples & Samples

Ensuring the logical design of a microprocessor satisfies the architectural specification
Creating and optimizing the validation environment, tools and methodologies
Analyzing micro architectural features to identify possible problem areas
Experience designing and validating SOC CPUs
Experience with SysVerilog/OVM/UVM SOC development environment
System debug skills
Solid understanding of system and processor architecture, and the interaction of computer hardware with software
Understanding of simulation techniques and hardware modeling
Hardware and software debug skills
Familiarity with software engineering practices

Experienced Pre-silicon Validation Engineer CPV Jerusalem Resume Examples & Samples

Engineers should possess a BSC or MSC degree in Electrical Engineering, Computer Engineering, Software Engineering or Computer Science
Knowledge in Very Large Scale Integration VLSI design and/or verification - Experience in developing Register Transfer Level RTL validation environment
Experience in working with Verilog/SVTB* and OVM/UVM* would be an added advantage

Server SoC Pre-silicon Validation Engineer Resume Examples & Samples

Oversees definition, design, verification, and documentation for SoC (System on a Chip) development
Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation
Performs Logic design for integration of cell libraries, functional units and sub-systems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits
Performs all aspects of the SoC design flow from high-level design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing
Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results

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