Logic Design Engineer Job Description
Logic Design Engineer Duties & Responsibilities
To write an effective logic design engineer job description, begin by listing detailed duties, responsibilities and expectations. We have included logic design engineer job description templates that you can modify and use.
Sample responsibilities for this position include:
Logic Design Engineer Qualifications
Qualifications for a job description may include education, certification, and experience.
Education for Logic Design Engineer
Typically a job would require a certain level of education.
Employers hiring for the logic design engineer job most commonly would prefer for their future employee to have a relevant degree such as Bachelor's and Master's Degree in Computer Engineering, Electrical Engineering, Design, Computer Science, Logic, Electronics, Engineering, Communication, Architecture, Computer
Skills for Logic Design Engineer
Desired skills for logic design engineer include:
Desired experience for logic design engineer includes:
Logic Design Engineer Examples
Logic Design Engineer Job Description
- Utilize TCAD simulations to both define optimal design of experiments (DOE) process splits, and to diagnose and find solutions for process and process integration problems
- While working closely with device and process engineers, utilize in-depth device physics and TCAD simulations to analyze and solve various process/device/reliability related issues
- While working closely with device and process engineers, utilize in-depth device physics and TCAD simulations to define and evaluate feasibility and potential performance of major device options, including novel device design/process integration concepts
- Report progress & results and document software & deck development activity in a clear, concise manner
- Architect and implement logic designs at the Verilog-RTL level
- Develop and apply simulation testbenches to assess functional behavior of soft IP, and assure interoperability with adjacent IP blocks in the chip subsystem
- Strong technical communication skills (written documentation & verbal communications)
- Interlock across the development team to assure the IP being developed meets all functional and quality requirements, and resolve complex technical problems
- Support the development of chip-level sign-off timing constraints
- Work closely with Field team and Marketing/Sales team to define System Level Solution and Reference Design
- Knowledge in custom logic based logic design
- Knowledge of solid state physics
- Solid experience within computer architecture/hardware design
- Ideally experience within design entry languages (VHDL, VeriLog) and design automation tools
- Self-motivated team-player with a passion for quality and innovation
- 3 years minimum experience with Verilog and digital IC development environment, tools, script writing
Logic Design Engineer Job Description
- Analyzing multiple uarch, RTL, and circuit options to find the optimal synthesis design point considering power/performance/area/cost tradeoffs
- Synthesis/Place and Route using industry standard tools for high speed CPU core design
- Developing functional block/unit RTL for architectural features and optimizing for power, area, and timing
- Develop and recommend better design methods/practices to enable better synthesis convergence
- Perform all aspects of design flow from logic synthesis, place and route, FEV, power, timing, quality checks
- Will be doing RTL (Verilog) coding and verification of the design using Verilog
- Will be doing design synthesis, STA DFT
- Take part of design and uArchitecture in USB part of Thunderbolt technology
- Translating data sheet information into working Verilog
- You will support and provide maintenance of existing Verilog code
- Design Experience with logic synthesis and formal equivalence checking
- Physical Design knowledge or experience is very helpful
- Design Experience with Static Timing Analysis is a plus
- Prefer experience with hands-on implementation of advanced-process high-speed chips
- Digital IC design (RTL, gates)
- Proficiency in Perl, Tcl, and Verilog
Logic Design Engineer Job Description
- Implement design in RTL
- Collaborate with pre-silicon validation team to develop functional test plans
- Collaborate with post-silicon to resolve silicon level sightings
- Collaborate with physical design team on floor planning and timing closure
- The successful candidate will be a hands-on Memory Subsystem Designer responsible for performing micro-architecture and logic design
- The design goals are a balance of high-performance, frequency, and power
- Logic design of various protocol and IO / Memory controller
- Chipset IPs for PEG group's mobile / tablet and desktop CPUs and chipsets
- Collaborate with HW/SW architects to gather prototype requirements and define architecture
- Define Micro-architecture of logic blocks while making power/performance/area trade-offs and write detailed specifications
- Very good communication skills (in particular, above average English skills)
- Shanghai office
- Approximately annual travel to US
- Normal office/computer environment
- BS (or higher) in EE /Computer Engg
- Some experience with state-of-the-art verification methodologies (ex RTL assertions, coverage, etc) and assembly language programming a big plus
Logic Design Engineer Job Description
- Own logical units of the ASIC design
- Performs logic design, Register Transfer Level RTL coding, and simulation for functional units, and subsystems for inclusion in full chip designs
- Architecture development and product definition, system integration and full-chip and block-level validation plan and execution
- RTL design and implementation of the controller hardware, synthesis, APR and full timing/power closure
- Development of firmware code for NAND operations such as Write, Read and Erase
- Validating the functionality of new architectural features of next generation designs by developing the validation test plan and participate in coverage analysis
- Work closely with other teams to follow up with all phases of design from conceptual design to production support efficiently
- Review design specification, draft / update verification plans, and develop verification testbenches
- Write scripts to help automate logic design & verification
- Architecture development and product definition, system integration and full-chip and block-level validation plan and execution RTL design and implementation of the controller hardware, synthesis, APR and full timing/power closure
- OGood RTL coding style to develop high performance/high efficiency/high reliability design
- ODeep understanding about timing closure to fix timing violation
- OSolid capability to understand algorithm and implement it with FPGA
- OExperience to develop test cases with good coverage
- Contributes to the elaboration of ERTMS specification & architecture, in collaboration with the ERTMS architect
- Contributes to creation of data base for the RBC
Logic Design Engineer Job Description
- Design of chip layout circuit design, circuit checking, device evaluation and characterization
- Perform developmental and/or test work, review product requirements and logic diagrams
- Work with a senior front end team to define and implement new RTL features
- Ensure the logic design meets architectural specifications
- Contribute to the micro-architectural feature specification
- Implement block and sub-block designs using SystemVerilog
- Balance design trade-offs between modularity, scalability, power, area, and performance
- Collaborate with the pre-silicon validation team to develop functional test plans
- Collaborate with the physical design team to converge the front end design for a clean hand-off, with emphasis on timing of critical structures
- Engage in early high-level architectural exploration, through micro architectural research and arriving at a detailed specification
- Contributes to Eurobalise and S-HMI data preparation for ETCS
- Contributes to the elaboration of trackside layout plans for ETCS Subsystem
- Utilizes specific SW tools for implementation of ETCS Subsystem
- Offers support to Telecom, V&V and T&C teams
- Maintains a strong link with ERTMS architects, System Engineers and HW Designers
- Applies processes and standards