Design Verification Job Description
Design verification
provides technical support for Synopsys implementation products including Synthesis, STA, Formal Verification, PNR, and Low Power Solutions.
Design Verification Duties & Responsibilities
To write an effective design verification job description, begin by listing detailed duties, responsibilities and expectations. We have included design verification job description templates that you can modify and use.
Sample responsibilities for this position include:
Identify, define, write and execute test cases for comprehensive and effective module level performance validation
Pre-silicon system verification
Collaborate with designers to debug failures
Implement functional and coverage assertions for stimulus and corner cases, and work to close coverage
Interface with prototype lab and software teams after component integration
Develop test environments and analysis coverage
Module and chip level synthesize with sdc/upf
Assist with chip bring up and perform silicon functional/perfornamce validation
Define timing and power specifications, and identify timing solutions
Assite with backend team on perform place-and-route and timing analysis of modules
Design Verification Qualifications
Qualifications for a job description may include education, certification, and experience.
Licensing or Certifications for Design Verification
List any licenses or certifications required by the position: NI, PMI, EU, FCC, MCAD, LM, ISTQB, OSHA, NELAC, ASCP
Education for Design Verification
Typically a job would require a certain level of education.
Employers hiring for the design verification job most commonly would prefer for their future employee to have a relevant degree such as Master's and Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, Engineering, Education, Science, Design, Electronics, Graduate, Industrial
Skills for Design Verification
Desired skills for design verification include:
Perl
System Verilog
Verilog
Synthesis
UVM
C
Simulation
Industry standard interfaces
Test bench development
Assertion based formal verification will be
Desired experience for design verification includes:
Familiarity with System Verilog and OVM/UVM preferred
Experience creating testbenches from scratch preferred
Experience with Verilog and hardware design a plus
BS or MS (preferred) in EE, with a minimum of 2 years of relevant industry work experience
Understanding of sub-micron silicon issues like noise, cross-talk, and OCV effects is a plus
Prior experience in implementing on-chip clocking networks is a plus
Design Verification Examples
1
Design Verification Job Description
Job Description Example
Our company is looking to fill the role of design verification. To join our growing team, please review the list of responsibilities and qualifications.
Responsibilities for design verification
- Work to ensure that all Engineering Test Lab activities are driven by and/or related to customer specifications
- Support existing products through an ongoing process of continuous improvement and engineering changes to enhance performance, longevity, and manufacturability
- Supervise the entire group in accordance with organizational policies and goals
- Provide support and assistance to other groups and departments as appropriate to enhance the performance and success of the company as a whole
- Continue to learn new skills and techniques through in-house training, outside training/coursework, seminars, trade shows and appropriate use of the internet, and participate in the training of other members of the engineering team in these skills
- Stay abreast of new technologies and opportunities
- Proactively develop and protect intellectual property using patent disclosures, non-disclosure agreements, patent applications, and other means as required
- Develop test suites for full chip and block level testing, using the latest tools and verification languages
- Manage the regression analysis
- Create patterns for ATE and assist in the bring-up of functional test vectors
Qualifications for design verification
- Experience with System Verilog or Perl a plus
- Candidate should be familiar with some of the following
- Exposure to the various verification techniques such as coverage based verification, formal verification techniques
- Familiar with industry standards (IEEE, ITU.T, FC-PI, ) and MSAs
- Hands on lab debugging/measuring skills using oscilloscopes, communication analyzers, logic analyzers
- Develop PLD/FPGA Verification environment and process applying DO-254 guidelines
2
Design Verification Job Description
Job Description Example
Our company is growing rapidly and is looking to fill the role of design verification. If you are looking for an exciting place to work, please take a look at the list of qualifications below.
Responsibilities for design verification
- Writing directed and random test cases, debugging failures, filing and closing bugs
- Writing, analyzing and achieving coverage metrics
- Identify issue and co-fix it with design engineer
- Create and execute test plans and test cases to verify that products meet product requirements and customer expectations
- Create and execute targeted engineering evaluations at the request of the design engineering staff
- Apply best practices and procedures to design, influence, and drive quality
- Generate test execution reports to review with the product team
- Participate in the failure review processes including identifying root cause, documenting and following through on the closed loop corrective action process
- Definition of verification/validation environment, and documentation for IP, SoC System on a Chip and system level development
- Responsible for complete functional verification of SOC at all levels pre-silicon and the validation of complete functionality and electrical interfaces post silicon
Qualifications for design verification
- MS in EE or CE with VLSI emphasis
- Ability to own a significant block or sub-block (in verification)
- Mastery of current industry standard verification methods
- Ability to analyse complex problems which exist at different levels of abstraction and hierarchy
- Familiarity with basic networking technologies and protocols is required
- Experience with data communications network, lab test equipment such as traffic generators, and automation scripting languages (preferably python)
3
Design Verification Job Description
Job Description Example
Our growing company is looking to fill the role of design verification. Please review the list of responsibilities and qualifications. While this is our ideal list, we will consider candidates that do not necessarily have all of the qualifications, but have sufficient experience and talent.
Responsibilities for design verification
- Create chip and block level testbenches for both digital and mixed-signal components using UVM SystemVerilog environments
- Devising test suites that ensure coverage of all design goals as specified in datasheets, design documents and published standards
- Design of individual tests (jigs and scripting) for testing of both analogue and digital circuits
- Investigation and isolation of exceptions discovered
- Documentation to a high standard of all results and exceptions
- Liaison with designers and/or technical management to resolve all issues arising
- Transfer of type testing routines to final production tests as and where appropriate
- Approval of engineering documentation including schematics, bills of material, production assembly instructions
- Contribution to and approval of datasheets
- Adherence to and/or contribution to the development of ISO 9001 approved departmental procedures and work instructions
Qualifications for design verification
- Experience with FPGA-based emulation
- Experience with embedded microcontrollers and low-level firmware
- Familiar with System Verilog language
- Capable of building Full Chip UVM testbench and test from scratch
- Flexible in dynamic environment
- 3 years minimum experience and working knowledge of Object-Oriented SystemVerilog principles using UVM/OVM/VMM methodologies
4
Design Verification Job Description
Job Description Example
Our company is looking to fill the role of design verification. If you are looking for an exciting place to work, please take a look at the list of qualifications below.
Responsibilities for design verification
- Focus on digital design verification in simulation and hardware prototype platforms
- Support verification lead to co-ordinate SoC design verification activities at all levels (module, subsystem IPs, SoC, Formal, GLS and FPGA)
- Track progress and performance while helping the development of engineers in his team
- Support DV lead by participating and allocating resource bandwidth for test plan reviews, milestone checklist reviews and Jiras assignments
- Act as the design verification lead for the analog/mixed-signal products developed by the consumer power team
- Deploy design verification best practices including verification planning, constrained randomization, metric tracking, and specification traceability
- Collaborate with analog and digital design teams on architecture definitions, test methodologies, and failure debug
- Participate in customer facing discussions and design reviews
- Work with FPGAs and digital power management IC prototypes
- Develop software to exercise digital power products with telemetry
Qualifications for design verification
- Experience integrating 3rd-party verification IP for industry-standard busses
- 8+ years hands-on IC design experience and a Bachelor’s degree in Electrical Engineering or related field
- 4+ years hands-on IC design experience and Master’s degree in Electrical Engineering or related field
- Bachelor's Electrical Engineering
- Maxim is an equal opportunity employer and gives consideration for employment to qualified applicants without regard to race, color, religion, sex, national origin, disability or protected veteran status
- Verification lead of at least 2 projects
5
Design Verification Job Description
Job Description Example
Our innovative and growing company is searching for experienced candidates for the position of design verification. Please review the list of responsibilities and qualifications. While this is our ideal list, we will consider candidates that do not necessarily have all of the qualifications, but have sufficient experience and talent.
Responsibilities for design verification
- Occasional offshore / site visits as and when required
- Plan verification of complex digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios
- Identify and write all types of coverage measures for stimulus quality measurements
- Verify connectivity for analog blocks and debug of full chip regressions in multiple areas of the chip
- Work with global Front-End design team for large scale ASIC microprocessor, security and cryptography related functions
- Responsible for multiple aspects in design verification planning and execution
- Reading Design Specifications and Converting the specs to Verification tests and plan
- Leads multiple project teams of other test engineers and internal and outsourced test partners responsible for all stages of systems, equipment, and device testing, including solution and test plan design, validation, tooling, test execution and results evaluation
- Manages and expands relationships with internal and outsourced partners for systems, equipment, and device testing
- Reviews and evaluates product designs and project activities for compliance with technology and testing guidelines and standards
Qualifications for design verification
- 4+ years hands-on IC verification experience and Master’s degree in Electrical Engineering or related field
- Intuitive and analytical understanding of CMOS design and verification
- Master’s degree in electrical engineering, computer engineering or related technical fields
- Must have capability to debug test failures to find the root cause both at RTL and gate level
- Bachelor’s degree and above in related field
- Typically 9 years of experience in IC design/verification industry