Verification Engineer Job Description
Verification engineer
provides C++ high-level model and HDL (Verilog) source.
Verification Engineer Duties & Responsibilities
To write an effective verification engineer job description, begin by listing detailed duties, responsibilities and expectations. We have included verification engineer job description templates that you can modify and use.
Sample responsibilities for this position include:
May also participate in new test program development or debug using C/C++ and/or Labview, and occasional test fixture design, construction and documentation
Have a central role in enabling many different validation activities, before and after we have the silicon in the lab
Develop Project Test Schedule Timelines/Deliverables, Maintenance Schedules and Scope of work for various projects and Test Properties
Work with V&V Engineers, Control Engineers, Emag Designers, Software Engineers, Systems Engineers to develop Testing Roadmap, Functional Objectives and Testing Requirements
Keep description of the test environment (both HW & SW) up-to-date
Develop test plan and test cases for bench tests
Perform data analysis on test results using various tools
Enter defects into the defect tracking tool and support cross functional team with defect analysis and debug activities
Develop and release all relevant verification engineering deliverables in compliance with Global Product Engineering Process (GPEP) and customer expectations
Reviewing and assessing proposed design changes – working with design engineers to refine future designs and ensure they are verifiable
Verification Engineer Qualifications
Qualifications for a job description may include education, certification, and experience.
Licensing or Certifications for Verification Engineer
List any licenses or certifications required by the position: ISTQB, ITIL, II, IAT, ASQ, IEC, UL, PDL, ITT, CSEP
Education for Verification Engineer
Typically a job would require a certain level of education.
Employers hiring for the verification engineer job most commonly would prefer for their future employee to have a relevant degree such as Bachelor's and Master's Degree in Computer Science, Electrical Engineering, Engineering, Computer Engineering, Science, Electronics, Design, Electronic Engineering, Education, Technology
Skills for Verification Engineer
Desired skills for verification engineer include:
Perl
Python
UVM
C/C++
System Verilog
Computer architecture
Verilog
Industry standard interfaces
C
Desired experience for verification engineer includes:
Bachelor's Degree in Engineering • 5+ years of experience with Microsoft Office and Spreadsheet Applications
5+ years of experience performing Basic PC Maintenance
3+ years of experience in SW Verification or related experience
2+ years of experience with Network Simulators such as Anite 9000 and R&S CMW500
2+ years of experience with Peripheral Test Equipment, such as digRF Sniffers, USB Analyzers, and Lauterbachs
Linux OS familiarity
Verification Engineer Examples
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Verification Engineer Job Description
Job Description Example
Our company is looking for a verification engineer. If you are looking for an exciting place to work, please take a look at the list of qualifications below.
Responsibilities for verification engineer
- Serves as the key interfaces to Product Engineering (PE), Characterization Engineering (CE), Applications Engineering (AE), Systems Engineering (SE) and Test Engineering (TE)
- Responsible for the transition from DVT testing to characterization to final test
- Primary job responsibilities may include automated or semi-automated testing of parts, data post-processing, plotting, statistical analysis, documentation
- Primary task is to properly execute DVT work requests using test programs provided by the design or test engineer and provide initial screening of measurement results
- Schedule and scrutinize DVT work requests for completeness and identify areas requiring additional clarification, resources, or test program development for new or unusual requirements
- Become proficient in test setup debug and troubleshooting to insure we successfully meet our primary responsibility
- Execute the tests and analyses results
- Develops the test environment and sets up regression and integration tests, verification and acceptance tests, as required in the projects
- Prepares an optimal automation test environment for each project, including specification of test tools and test criteria
- Verification of the NFC/EMVCo Test Systems (quality assurance before official release)
Qualifications for verification engineer
- Android Programming and SDK familiarity
- Embedded Microprocessor SW experience
- 2+ years of experience with lab equipment used for mobile systems testing (CMU200/CMW500/Agilent/etc)
- 2+ years of experience in Functional Release Testing (FRT)
- Experience with encryption/decryption of AES128 or Experience with memory controllers, memory models(ddr4, lpddr, G5, or HBM) and/or ddr phys is a plus
- Support the Design and Development of test infrastructure electrical and mechanical aspects such as Carrier boards/Load boards for signal conditioning, load mounting, fixturing, plumbing, manual/electronic flow control, temperature, flow rate, viscosity sensors and actuators in partnership with Electrical, Mechanical and EMC Engineering teams
2
Verification Engineer Job Description
Job Description Example
Our company is growing rapidly and is hiring for a verification engineer. Thank you in advance for taking a look at the list of responsibilities and qualifications. We look forward to reviewing your resume.
Responsibilities for verification engineer
- Work within a UVM System Verilog environment to develop tests achieving high coverage vs
- Verifying parts of IoT Systems using SystemVerilog/UVM
- Interface between software development team and engineering IT organization to provide solutions to cutting edge computing, simulation and data visualization challenges in support of an international engineering organization
- Understand and expose to all design blocks full-chip architecture of a product with focus of DFT features
- Analyze, evaluate, design and verify new concepts
- Develop new concepts for improved performance, durability, cost and space
- Participate in internal training exercises/technical exchanges
- Present technical proposals to customers
- Able to suggest and implement improvements in acquisition, analysis, and simulation techniques
- Develop test automation scripts and libraries using industry standard test automation tools
Qualifications for verification engineer
- Experience with OVM/UVM is preferred
- Ability to understand, explain, apply standard control theory concepts such as but not limited to “FEED FORWARD”, “PID”, “CURRENT CONTROL”, “SPEED CONTROL”, “TORQUE CONTROL”, “OPEN/CLOSE LOOP CONTROLS”
- Understand the mechanical, electrical, thermal, fluid interactions between motor/pump/pcb/software during controls systems testing
- Execute tests and co-relate data/product behavior from various test systems such as SMART Load Box for Controls, HIL, Dynamometer, Fluid Test System
- Identify and root-cause deficiencies
- Design, Develop, Commission and Deploy world class HILs, SMART Load boxes, Dynamometers and associated infrastructure using technologies such as but not limited to Matlab, Simulink, dSPACE to test both ECU-Level and System-Level controls requirements
3
Verification Engineer Job Description
Job Description Example
Our growing company is looking for a verification engineer. If you are looking for an exciting place to work, please take a look at the list of qualifications below.
Responsibilities for verification engineer
- Provides needed training on disposable product (catheter and wire) uses, requirements and testing to groups such as Systems Engineering and Systems Verification
- Oversees the generation of work instructions, preventative maintenance schedules, documentation for components, tooling, and processes of moderate complexity
- Supports generation and maintenance of pressure wire Process FMEA as part of the Design Control process
- Leads the transfer of new designs from R&D to production
- Able to teach design controls and defend in audits (mentors)
- Leads the development and validation of new test methods
- Define, perform and analyze complex linear experiments and complex DOE’s
- Being a team player as part of Development Scrum Team
- Analyses test results, analyses the cause of errors, and gives feedback to the Development Engineers, reports results to project management
- Work, think and act as a System tester with other Development teams to improve the product testability
Qualifications for verification engineer
- Support test infrastructure electrical and mechanical aspects development such as Carrier boards / Load boards for signal conditioning, load mounting, fixturing, plumbing, manual/electronic flow control, temperature, flow rate, viscosity sensors and actuators in partnership with V&V and cross functional teams
- Experience with of Matlab/Simulink, State flow, EMAG, dSpace, Electrical Circuit Design aspects
- Interface the DRY and WET test setups with the ePUMPS/ePUMP Motors and test system control electronics such as HILs, Microautobox Support the complete commissioning of these DRY and WET Test systems
- Degree Qualified in an Engineering or science discipline or appropriate experience
- Experience with large project construction approaches
- Experience with large projects in a Project Management role
4
Verification Engineer Job Description
Job Description Example
Our innovative and growing company is hiring for a verification engineer. If you are looking for an exciting place to work, please take a look at the list of qualifications below.
Responsibilities for verification engineer
- Analyze chip architecture and Micro-architecture specifications, work with team to come up with chip level simulation environment in System Verilog which is scalable for multiple SoC ASIC developments
- Build up core competence in the Ethernet domain
- Verification competence holder in the group
- Define the verification strategy for the group
- Make verification plans and specs
- Execute (block level) verification
- Basic synthesis and timing verification
- Documentation of the work done
- Perform verification planning
- Responsibility for the development of the verification environment
Qualifications for verification engineer
- Experience with the new Verification (ASTM 2500) approach
- Knowledge and experience with a plant start-up
- Hands on experience in wiring new/reusable test-benches is highly desirable
- Familiarity with make and build flow is highly desirable
- Hands on experience on safety verification would be a plus
- PERL or equivalent experience is desirable
5
Verification Engineer Job Description
Job Description Example
Our growing company is looking to fill the role of verification engineer. Please review the list of responsibilities and qualifications. While this is our ideal list, we will consider candidates that do not necessarily have all of the qualifications, but have sufficient experience and talent.
Responsibilities for verification engineer
- Implement Test bench to support UVM/System Verilog based verification
- Architect and implement TB to support assembly and System Verilog based verification
- Assist in the migration of existing test suite to new System Verilog based environment
- Develop an effective suite of tests and test environments using a mix of Verilog and assembly code to achieve functional verification goals
- Architect and develop testbench for 16/32-bit Microcontroller products using UVM and/or VMM advanced verification methodologies
- Working with design engineers to specify complex hardware components, and creating verification specifications
- Design and execute functional tests (including regression, integration and sanity) and analyze results, according to product requirements
- Execute manual tests across multiple browsers, applications and data bases
- Own the testing activities within the scrum team and execute them according to the Agile methodology
- Lead our formal verification work
Qualifications for verification engineer
- Expert level knowledge of EDA Functional simulators - Incisive/VCS
- Prior experience with Error Injection based verification preferred
- Knowledge of Simulators like VCS, Questa, NCSim
- Able to work alone contributing to a project team
- Experience in writing testcode in assembly, C, HVL and higher abstraction languages
- Maintain a competent knowledge of company processes in order to work constructively within given standards and methodologies